In accordance with the present invention, a plurality of package assemblies for image sensors and other optically interactive electronic devices are simultaneously fabricated to minimize process steps and reduce the cost associated with each individual package. The methods of fabrication also reduce the possibility of contaminants being deposited on the active surface of a device during assembly. While the following exemplary packaging embodiments are depicted in terms of image sensor chips, it should be understood that the package assemblies and methods presented herein would work equally well for enclosing other types of optically interactive electronic devices. The term “optically interactive” as used herein is meant to encompass devices sensitive to various wavelengths of light or other forms of radiation, including, but not limited to, CCD and CMOS image sensors, EPROMs, and photodiodes, as well as light-emitting devices including semiconductor lasers and light-emitting diodes.
In a first embodiment according to the present invention, a wafer of semiconductor material is provided containing a plurality of image sensor chips with active surfaces arranged in an array on the front side of the wafer. The active surface of each image sensor chip includes an image sensitive area and bond pads for providing electrical connection to internal circuitry of the image sensor chip. A transparent cover of a size sufficient to cover the array of image sensor chip active surfaces is attached to the front side of the wafer using an adhesive material. The adhesive material is formed in a pattern such that, when the transparent cover is attached, the adhesive material lies between the bond pads and the image sensitive area on the active surface of each image sensor chip. The pattern of adhesive material may be applied to the front side of the wafer and/or to the transparent cover.
Once the wafer and transparent cover are joined, a layer of semiconductor material is removed from the back side of the wafer by backgrinding to reduce the image sensor chips to a desired thickness. A dicing or singulating operation is then carried out to separate the image sensor chips from the wafer. In a first stage of the dicing operation, the transparent cover is cut along the edge of the pattern of adhesive material surrounding the image sensitive area on the active surface of each image sensor chip. The bond pads on the active surface of each image sensor chip are thus left exposed for further processing, while the image sensitive area of the active surface is sealed by the remaining portion of the transparent cover. In a second stage of the dicing operation, the wafer is cut along streets of semiconductor material located between adjacent image sensor chips for complete separation.
Each individual image sensor chip is subsequently affixed to an interposer substrate having conductive traces. The conductive traces extend from attachment pads formed on a first surface of the interposer to which the image sensor chips are attached, to external connection points on a second, opposing surface of the interposer. Wire bonds are formed to electrically connect the image sensor chip bond pads with the interposer attachment pads. A layer of encapsulant material is then formed over the first surface of the interposer to cover the wire bond locations and surround the edges of the transparent cover attached to each image sensor chip. Discrete conductive elements such as solder balls are formed on, or attached to the external connection points of the interposer, and the interposer is singulated to provide individual image sensor package assemblies.
In a second embodiment according to the present invention, image sensor package assemblies are formed as in the first embodiment, but the image sensor chips are not connected to the interposer attachment pads using wire bonds. Instead, the image sensor chips include back side conductive elements configured for direct connection to the interposer attachment pads. In one variant of the second embodiment, the image sensor chips include conductive vias extending from the image sensor chip active surfaces into the wafer semiconductor material. The vias are exposed through the back side of the wafer during the backgrinding process and conductive elements such as bumps or pads are formed over the vias on the back side of the wafer. The back side conductive elements may then be directly connected to the interposer attachment pads. In another variant of the second embodiment, after separating the image sensor chips from the wafer, a redistribution layer (RDL) may be formed on each image sensor chip to provide conductive traces extending from the bond pads to the edge of the active surface and down to the back side of the image sensor chip. Conductive bumps or pads may then be formed on the RDL traces at locations configured for direct connection to the interposer attachment pads.
In a third embodiment according to the present invention, the transparent cover is not attached to the image sensor chips at the wafer level. Instead, after dicing the wafer, the individual image sensor chips are affixed to the interposer and electrically connected to the interposer attachment pads. Individual transparent covers are attached to each of the image sensor chips with an adhesive material. The formation of the layer of encapsulant material, discrete conductive elements and singulation of the interposer are then carried out as in the first embodiment. The third embodiment enables the transparent cover to overlie the entire active surface of an image sensor chip and also allows the adhesive material to be placed directly over any wire bond connections.
In a fourth embodiment according to the present invention, image sensor package assemblies are formed by mounting individual image sensor chips within the cavity of a preformed leadless chip carrier (LCC). In one variant of the fourth embodiment, individual image sensor chips having transparent covers are affixed to an interposer substrate as in the first through third embodiments. Discrete conductive elements are included on the external connection points of the interposer; however, the interposer is singulated without adding a layer of encapsulant material to form a packaging subassembly. The packaging subassembly is then mounted within the cavity of an LCC, and the cavity is filled with a liquid sealant that covers the packaging subassembly and surrounds the edges of the transparent cover attached to each image sensor chip. In another variant of the fourth embodiment individual image sensor chips are formed with transparent covers as in the first through third embodiments, and are affixed directly to the bottom of the LCC cavity such that the LCC itself is the interposer substrate. The cavity is filled with a liquid sealant that covers the packaging subassembly and surrounds the edges of the transparent cover attached to each image sensor chip.
Other and further features and advantages of the present invention will be apparent from the following descriptions of the various embodiments when read in conjunction with the accompanying drawings. It will be understood by one of ordinary skill in the art that the following embodiments are provided for illustrative and exemplary purposes only, and that numerous combinations of the elements of the various embodiments of the present invention are possible.